This weeks reading covered paging, Translation Look Aside Buffers(TLB), and swapping. I’ll attempt to briefly summarize my understanding.

Paging is one of methods for virtualizing memory which essentially divided physical memory into fixed size units called frames. But with paging and segmentation the major flaw is external or internal fragmentation where memory has been divided up into units that are too small and there is no contiguous to satisfy requests for following. Enter coalescing, which allows for merging of free memory to satisfy requests essentially.

Next we have TLBs, TLBs are part of the memory management units which is a hardware cache. TLBs allow for translation of virtual to physical address translations. Generally when there is a virtual memory reference the hardware will check TLB if it’s in there. Since TLB is on chip these translations occur rapidly if they are present.

Lastly, Swapping utilize space on disk to for moving pages back and forth. Generally the swap space is a partition on the disk where the OS can read and write to, furthermore the OS must remember the disk address of a given page. The Present bit was added to allow for pages to be swapped to disk because when the hardware goes to look for the page it may not be present in the memory.

Key takeaways:

• The hardware first extracts the VPN from the virtual address and checks the TLB for a match or a TLB hit, if successful it will produce the resulting physical address and fetches it from the memory.
• IF the VPN is not found or TLB MISS the hardware will locate the page table in the memory using the page table base register and looks up the page table entry for the page using the VPN as an index. If the page is valid and present  the hardware extract the PFN from the PTE and installs it in the TLB and retries.